Post Highlights
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70-80% on advanced process technologies (N3, N2, A16)
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10% on specialty technologies
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10-20% on advanced packaging, testing, and infrastructure
The number that frames everything
NVIDIA spent $6 billion on capital expenditure in FY2026. That is 2.8% of its revenue.
TSMC spent $40.9 billion. That is 33% of revenue.
AMD's entire annual revenue in FY2025 was $25.7 billion. TSMC's capital expenditure exceeded it.
Both are semiconductor companies. One designs chips. The other manufactures them. That single difference in function produces one of the most striking divergences in financial structure you will find anywhere in public markets.
NVIDIA keeps 71 cents of every revenue dollar after production costs. TSMC keeps roughly 60 cents while running some of the most capital-intensive manufacturing operations in human history. The question worth asking is not why NVIDIA's margins are higher. It is why TSMC's margins hold at 60% at all, given what it spends every year to stay in the game.
What TSMC actually does
TSMC is a pure-play foundry. It does not design chips. It does not sell chips under its own name. Companies like NVIDIA, AMD, Apple, Qualcomm, and Broadcom bring their chip designs to TSMC, and TSMC manufactures them.
This model manufacturing without designing was not the industry norm when TSMC was founded in 1987. Morris Chang made a specific bet: chip designers were being held back by the cost of building and running their own factories. If TSMC built the fabs and sold manufacturing as a service, designers could focus entirely on architecture. The fabless model that now defines most of the semiconductor industry grew directly from that bet.
Today TSMC holds approximately 70% of the global pure-play foundry market and above 90% of advanced node production. Samsung is the closest competitor. Samsung's foundry market share dropped from around 13% in early 2024 to roughly 7%. The gap is not narrowing.
TSMC served 522 customers and manufactured 11,878 distinct products in 2024 alone. Understanding how that translates into $122.9 billion in annual revenue starts with understanding how TSMC prices its work.
How TSMC actually makes money
TSMC charges a per-wafer fee. The customer provides the chip design. TSMC provides the manufacturing environment, the process expertise, the equipment, and the silicon wafer.
The price is not flat. It rises substantially as process nodes shrink, because smaller nodes require more advanced equipment, more production steps, and far more precise process control. TSMC prices that complexity directly into the wafer cost.
| Node | Pricing signal | Current status |
|---|---|---|
| 5nm (N5) | Mature baseline | High-volume, margin contributor |
| 3nm (N3) | ~30-40% premium over N5 | Crossing corporate margin average in FY2026 |
| 2nm (N2) | ~50% premium over N3 | High-volume manufacturing began Q4 2025 |
| A16 | Not yet disclosed | ~2027 estimated entry |
The pricing structure is the business model. As advanced nodes grow as a share of revenue, average revenue per wafer rises even without any increase in physical volume. In FY2025, advanced nodes (7nm and below) represented 74% of TSMC's wafer revenue, up from 69% in FY2024. That shift is not accidental it is the direct result of N3 scaling faster than any prior node in TSMC's history.
N2 is the next step. It uses gate-all-around transistor architecture, the first fundamental change in transistor design since FinFET. It offers roughly 25-30% power reduction versus N3E and commands approximately a 50% price premium per wafer. That premium is the financial mechanism behind TSMC's long-term margin expansion: each generation is more complex to build, more expensive to buy, and there is no alternative at the leading edge.
FY2025 results: what the full-year numbers show
2025 was TSMC's strongest year by every financial metric in its history.
| Metric | FY2025 | FY2024 | YoY change |
|---|---|---|---|
| Revenue | $122.9B | $90.1B | +35.9% (USD) |
| Gross margin | 59.9% | 56.1% | +3.8pp |
| Operating margin | 50.8% | 45.7% | +5.1pp |
| Net income | ~$55.4B | ~$36.5B | +51.7% |
| EPS | NT$66.25 | NT$45.25 | +46.4% |
| CAPEX | $40.9B | ~$30B | +36% |
The number most worth examining is the gap between revenue growth (35.9%) and net income growth (51.7%). Net income grew significantly faster than revenue. That gap is operating leverage TSMC's fixed infrastructure costs are spreading across a larger revenue base, converting incremental revenue into profit at an accelerating rate. That is what happens when expensive fabs run close to full utilization.
Note on revenue growth: the 35.9% figure is in US dollar terms. In New Taiwan Dollar terms, growth was 31.6%. The difference reflects TWD currency appreciation against the dollar during 2025. Both are accurate the USD figure is what most analysts reference because TSMC reports guidance in USD.
Who TSMC's customers are
TSMC had 522 customers in 2024. The revenue is heavily concentrated at the top.
NVIDIA is the largest single customer at approximately 22% of revenue roughly $27 billion annually at current run rates.
Apple is second at approximately 18% of revenue roughly $22 billion.
The top five customers (NVIDIA, Apple, AMD, Broadcom, Qualcomm) account for an estimated 65-70% of total revenue.
By end market:
| End market | FY2025 share | FY2024 share |
|---|---|---|
| HPC (AI and data center)58% | 58% | ~52% |
| Smartphone | 29% | ~32% |
| IoT | 5% | 5% |
| Automotive | 5% | 4% |
HPC grew 48% year over year and now represents more than half of TSMC's revenue. Five years ago, that share was roughly 30%. The shift happened fast and shows no sign of reversing.
The concentration matters for understanding where TSMC's revenue actually comes from. It does not follow consumer sentiment or broad GDP cycles. It follows hyperscaler capital expenditure decisions and chip design cycles. When Microsoft, Amazon, Google, and Meta commit to building AI infrastructure, NVIDIA orders wafers from TSMC. TSMC's revenue follows that spending with a 1-2 quarter lag.
The CAPEX question: why $40.9 billion, and why $52-56 billion next
TSMC's 2026 CAPEX guidance of $52-56 billion is the largest single-year capital commitment in semiconductor history.
To understand why, you need to understand the timeline. Fab construction runs 2-3 years from groundbreaking to first wafer output. Capital committed in 2026 builds capacity for 2028-2029 demand. TSMC does not build speculatively before committing capital, it takes capacity reservations from named customers. The $52-56 billion is a response to contracted demand, not a forecast.
Allocation of 2026 CAPEX:
- 70-80% on advanced process technologies (N3, N2, A16)
- 10% on specialty technologies
- 10-20% on advanced packaging, testing, and infrastructure
The equipment costs alone explain a significant portion. ASML's High-NA EUV lithography machines cost approximately $380 million per unit. Each leading-edge fab configuration requires multiple machines. ASML is the only manufacturer of these machines. There is no alternative supplier and no volume discount.
One useful measure of how effectively TSMC deploys this capital: asset turnover. In FY2025, TSMC generated $122.9 billion in revenue on approximately $185 billion in total assets a ratio of roughly 0.66x. For capital-intensive manufacturing, that is high. It confirms the fabs are running at strong utilization, not sitting partially idle. A competitor buying identical equipment at 50% utilization faces the same CAPEX with significantly worse unit economics. Scale in this business is not a strategic nice-to-have. It is the difference between profitable and not.
Geographic expansion: Arizona, Japan, Germany
Most of TSMC's advanced capacity is in Taiwan. That concentration is the primary non-financial risk in any TSMC analysis, and TSMC is spending aggressively to change it.
Arizona: Four fabs are planned. Fab 1 (N4 process) began volume production in late 2024. Fab 2 (N3/N2) is under construction with high-volume manufacturing expected in the second half of 2027 a timeline TSMC pulled forward from 2028. Construction of Fab 3 has already started. Permits for Fab 4 are being filed. Total Arizona investment will exceed $65 billion. C.C. Wei described the Arizona cluster as a plan to create an "independent GIGAFAB cluster" a self-sufficient advanced node manufacturing hub outside Taiwan.
Japan: JASM (Japan Advanced Semiconductor Manufacturing), a joint venture with Sony, DENSO, and Toyota, operates a first fab in Kumamoto at 22/28nm and 12/16nm processes. A second Kumamoto fab adding 6/7nm capability is under construction. Total JASM investment exceeds $20 billion.
Germany: A specialty technology fab in Dresden the ESMC joint venture with Bosch, Infineon, and NXP is under construction, targeting 28/22nm for automotive and industrial customers.
The financial cost of this expansion is explicit in management guidance. Overseas fabs carry higher operating costs during ramp: higher labor, higher energy, lower initial utilization. Management has guided a 2-4% gross margin headwind from overseas fab dilution over the next several years. They are building strategic redundancy knowing it will cost margin in the near term. That is a deliberate trade-off.
Why no competitor has closed the gap
Samsung has invested approximately $200 billion in foundry operations over the last decade. Its global foundry market share dropped from around 13% to roughly 7%.
The money did not close the gap. It may have widened it.
Yield data compounds over time. TSMC's manufacturing advantage comes from thousands of production runs accumulated across 35 years. Every run generates data where defects appear, what process adjustments fix them, how specific chip architectures interact with the manufacturing environment at the nanometer scale. That data is the foundation of yield rate improvement, and yield rate determines whether a fab is profitable or a money pit. A competitor launching an advanced node today starts with no yield history at that node. TSMC starts each new node with learnings from the previous five. That head start converts directly into lower cost per good wafer, even when nominal wafer prices are identical.
Co-development creates lock-in. Apple, NVIDIA, and AMD share their next-generation chip roadmaps with TSMC years before those chips reach production. Chip architects design future products around TSMC's process specifications specifications that are still in development at the time of design. The chip design cycle runs 3-5 years. Switching foundries is not a procurement decision. It means rebuilding the entire chip design process around a different set of manufacturing parameters. The switching cost is measured in years of R&D and hundreds of engineers, not procurement negotiations.
Scale creates asymmetric cost structures. Higher volume means more process runs, more optimization data, and lower fixed-cost depreciation per wafer. A competitor running 30% of TSMC's volume at the same node carries structurally higher cost per wafer not because of inferior engineering, but because the fixed cost math works against lower scale. TSMC's volume advantage compounds across every node it runs simultaneously.
For a deeper analysis of exactly why Samsung's $200 billion failed to close this gap:
Samsung spent $200B on foundry operations and lost market share TSMC's moat isn't what you think
Current performance
For how this business model translated into quarterly results in Q4 2025 the record gross margin beat, node mix shift, and what Q1 2026 guidance signals about the margin expansion thesis:
TSMC Q4 2025: guided 59-61% gross margin, delivered 62.3% the beat that changes the outlook
For how US trade policy, Taiwan geopolitical risk, interest rates, and AI infrastructure spending cycles affect TSMC's financials and what is already priced in versus what is not:
TSMC earns 74% of revenue from the US : one tariff decision rewrites the investment case
The market calls TSMC a commodity manufacturer because it runs factories. I think that framing has been wrong for a long time, and it keeps being wrong in ways that matter for investors.
Commodity manufacturers compete on price. TSMC competes on capability. At advanced nodes, there is no one else with that capability at scale. Samsung has tried for a decade with more capital than most countries deploy on national infrastructure. The result is a foundry market share that has been cut in half.
The $52-56 billion 2026 CAPEX is the number I keep coming back to. Not because of the size it is large, yes but because TSMC commits it knowing it will compress gross margins 2-4% in the near term from overseas fab dilution and N2 ramp costs. A company that competes on price does not willingly compress margins to build infrastructure for demand that materializes in 2028. A company with genuine conviction in its long-term position does.
C.C. Wei said on the Q4 2025 call that AI demand "looks like it is going to be endless." Take that literally and you will get it wrong. Take it as a signal about the confidence behind a $52-56 billion capital allocation decision, and it tells you something real.
The single metric to track in 2026 is N3 gross margin progression. Management said N3 will cross the corporate gross margin average in FY2026. N3 started commercial production in mid-2023 and was margin-dilutive for six consecutive quarters. If it crosses the corporate average this year, it confirms the cycle: new nodes launch dilutive, scale to neutral, then become accretive.
N2 entered high-volume manufacturing in Q4 2025. The clock on its progression has started.
When N2 shows its first quarter at or above the corporate gross margin average that is the signal the margin expansion thesis extends to gate-all-around architecture as cleanly as it extended to FinFET. Watch per-node margin commentary in TSMC's quarterly management reports. That is where the real signal lives, not the headline revenue numbers.
FAQs
How does TSMC make money?
TSMC charges a per-wafer fee to manufacture chips that customers design. Pricing varies by process node N3 wafers cost more than N5, which cost more than N7. Advanced nodes (7nm and below) represented 74% of TSMC's 2025 wafer revenue, which is why gross margins are higher than they were five years ago when mature nodes made up a larger share of the mix.
Why is TSMC's gross margin lower than NVIDIA's?
Because TSMC runs the factories. NVIDIA outsources manufacturing to TSMC, which removes factory capital costs entirely from NVIDIA's margin structure. TSMC spent $40.9 billion in capex in 2025 approximately 33% of revenue. That spending is why the margin profile is 60 cents per dollar rather than 70.
Who are TSMC's biggest customers?
NVIDIA is the largest at approximately 22% of revenue. Apple is second at approximately 18%. AMD, Broadcom, and Qualcomm follow. The top five customers together account for an estimated 65-70% of total revenue.
What is TSMC's 2026 CAPEX guidance and why is it so large?
TSMC guided 2026 capex at $52-56 billion the largest single-year semiconductor capital commitment in history. The majority funds advanced process technologies (N2, N3, A16) and geographic expansion in Arizona, Japan, and Germany. Capital committed in 2026 builds capacity that comes online in 2028-2029, when TSMC expects AI infrastructure demand to remain strong.
What is the Taiwan geographic risk for TSMC investors?
Most of TSMC's advanced node capacity is in Taiwan. Geopolitical disruption would affect every company dependent on advanced chips NVIDIA, AMD, Apple, Qualcomm not just TSMC. The Arizona GIGAFAB cluster, JASM in Japan, and ESMC in Germany are TSMC's active responses. The near-term financial cost is a 2-4% gross margin headwind from overseas fab dilution during ramp.
What is the N2 node and why does it matter?
N2 is TSMC's newest process, which entered high-volume manufacturing in Q4 2025. It uses gate-all-around transistor architecture a fundamental structural change from FinFET offering roughly 25-30% power reduction versus N3E. N2 wafers are priced approximately 50% higher than N3 wafers. Its revenue contribution will grow through 2026-2027 on the same trajectory N3 followed after its 2023 launch.
What does TSMC's 2025 revenue growth actually mean?
Revenue grew 35.9% in US dollar terms and 31.6% in New Taiwan Dollar terms. The difference reflects TWD appreciation against the dollar during 2025. Both figures are accurate. The USD number gets more analyst coverage because TSMC reports guidance in USD. Net income grew 51.7% faster than revenue which means operating leverage is working as fabs run closer to full utilization.